Nowadays, most inner trackers for high-energy particle experiments are equipped with silicon detectors, either in strip or pixel form. They are quite convenient because silicon detectors take advantage of electronics foundry technology, silicon is quite cheap, and it can withstand high doses of radiation. Future colliders will continue to use silicon for some years to come, since it has shown extremely good qualities for tracking and particle detection.
Depending on the application or experiment, different silicon detectors work better than others. This seminar will discuss two technologies, 3D and passive CMOS strip detectors.
3D detectors have vertical columns along the silicon bulk as electrodes, and the drift distance of the electrons and holes is defined by the distance along the columns. Because the drift distance is shorter, they have faster signals and less trapping and power consumption. One of the main drawbacks is the complexity of the technique used to fabricate these detectors, as a hole is etched through the silicon bulk using Deep Reacting Ion Etching (DRIE).
Passive CMOS strip detectors explore the fabrication of large area strip detectors in a CMOS foundry. CMOS foundries do the photolithography with a stepper motor because it has better resolution, but it has to use different reticles. So the reticles have to be repeated several times along the wafer to cover the whole area and be stitched together, which can affect the performance of the detector.
This talk will discuss the feasibility and complexity of both technologies, both very interesting for future experiments.
